Phase Locked Loop Simulator in SystemC-AMS

Fri, 02 Mar 2018 08:30:00 +0100

1. Introduction

When I started to learn SystemC-AMS one of the first circuits I decided to implement was a Phase Locked Loop. The reason for this is because I have had an experience simulating a 2.4GHz PLL while I was member of the Microelectronics Student’s Group, and I realized how difficult is to simulate such circuit, specially when the output and the reference frequency are several orders of magnitude apart. The simulator has to use a small time-step to accommodate the higher frequency but at the same time, the PLL will take a relatively long time to lock and reach the steady state.

Simulation on Américo Dias

Phase Locked Loop Simulator in SystemC-AMS

1. Introduction